1. Field of the Invention
The present invention relates to a poly-silicon liquid crystal display (LCD) device and a method for fabricating the same. More particularly, the present invention relates to a method for fabricating a poly-silicon LCD device having a capacitor that reduces the number of masks.
2. Description of the Related Art
In general, a liquid crystal display (LCD) device, for example, has a display unit for displaying images and a driving circuit unit for driving the display unit, wherein the display unit and the driving circuit unit are connected to each other by a tape carrier package (TCP). Alternatively, a LCD device integrated with driving circuits (hereinafter “integrated-type LCD device”) has a display unit and a driving circuit unit, wherein the display unit and the driving circuit unit are formed on the same substrate.
Accordingly, the integrated-type LCD device can be more easily fabricated than the general LCD device. For the integrated-type LCD device, poly-silicon is commonly used as an active layer, since poly-silicon has better carrier mobility than amorphous silicon. Thus, the integrated-type LCD with poly-silicon transistors can operate at a high speed. For example, a carrier mobility of an amorphous thin film transistor (TFT) is 0.1˜1 cm2/Vsec, while a carrier mobility of a poly-silicon TFT formed by an excimer laser exceeds 100 cm2/Vsec.
The integrated-type LCD device will now be described with reference to FIG. 1.
FIG. 1 is a schematic plan view of a poly-silicon LCD device according to a related art. Referring to FIG. 1, an integrated-type LCD device includes a display unit 101 having pixels arranged in a matrix configuration and a driving circuit unit 102 arranged along an outer periphery of the display unit 101 for driving the display unit. The driving circuit unit 102 further includes a gate driver 104 and a data driver 103. The display unit 101 and the driving circuit unit 102 are formed on the same substrate. In the driving circuit unit 102, complementary metal oxide semiconductor (CMOS) devices having P-type TFTs and N-type TFTs drive the pixels of the display unit.
The switching devices may be formed by a silicon on glass (SOG) method which uses a poly-silicon layer grown on a substrate as a channel layer. The P-type TFT and the N-type TFT have the same structure, and but they are different in types of ions injected into the poly-silicon layer.
The structure and fabrication process of the poly-silicon LCD device will now be described, for which a P-type TFT fabrication process is taken as an example.
Each pixel includes a TFT as a switching device for driving a pixel and a capacitor for storing a data signal. FIG. 2 is a sectional view illustrating a structure of a poly-silicon TFT having a capacitor according to a related art. Referring to FIG. 2, a poly-silicon layer 202 is used as an active layer 202a of a P-type TFT, and is also used as an electrode 202b of a storage capacitor. A gate insulating layer 203 is on the poly-silicon layer 202, and a gate metal 205 is formed on the gate insulating layer 203. A gate electrode 205a and a storage capacitor electrode 205b are formed by patterning the gate metal 205 by a photolithography process. An interlayer insulator 206 is formed on the gate electrode 205a and the storage capacitor electrode 205b, and a contact hole 210 for connecting source/drain electrodes 207 and 208 to the active layer is formed through the interlayer insulator 206 and the gate insulating layer 203. The source/drain electrodes 207 and 208 contact the active layer 202a through the contact hole 210. A passivation layer 209 is formed on the resultant structure in order to protect the TFT.
A fabrication process of the poly-silicon liquid crystal display device (LCD) will now be described with reference to FIGS. 3A to 3E.
As shown in FIG. 3A, an amorphous silicon layer is formed on a substrate 301 by a Plasma Enhanced Chemical Vapor Deposition (PECVD) method. In order to transform the amorphous silicon layer to a poly-silicon layer, the amorphous silicon layer undergoes a heat treatment at a high temperature in a furnace or by a laser annealing. With the heat treatment and a photolithography process, the amorphous silicon layer becomes a poly-silicon layer 302, which includes a TFT region 302a and a storage capacitor region 302b. 
In order to use the storage capacitor region 302b of the poly-silicon layer as one of the electrodes of a storage capacitor, the storage capacitor region 302b is highly doped with impurity ions. FIG. 3B illustrates a doping process (metallizing) in which P+ ions are injected into the storage capacitor region 302b. Referring to FIG. 3B, after the poly-silicon layer is formed on the substrate 301, the TFT region 302a is covered by a photo-resist 304, and the storage capacitor region 302b is exposed for the doping process. Accordingly, a masking process is required in order to form the storage capacitor region 302b according to the related art.
Next, as shown in FIG. 3C, a gate insulating layer 303 is formed on the poly-silicon layer 302, and a gate electrode 305a and an electrode 305b of the storage capacitor are formed on the gate insulating layer 303. The gate electrode 305a and the electrode 305b of the storage capacitor are formed of the same metal layer. Thus, the storage capacitor has the storage capacitor region 302b, which is a doped poly-silicon layer, and the electrode 305b as storage capacitor electrodes, and the gate insulation layer 303 as a dielectric layer.
After forming the gate electrode 305a, source and drain regions are formed by injecting p-type impurity ions such as boron into the poly-silicon layer using the gate electrode 305a as a mask, as shown in FIG. 3D.
Next, as shown in FIG. 3E, an interlayer insulator 306 of silicon nitride or silicon oxide is formed on the gate electrode 305a, and a contact hole 310 is formed. Then, a conductive layer is deposited in the contact hole 310 and on the interlayer insulator 306, and is then patterned to form source/drain electrodes 307 and 308. Thus, the source/drain electrodes 307 and 308 contact the source and drain regions through the contact hole 310. After forming the source/drain electrodes, a passivation film 309 is formed on the entire surface of the substrate to protect the source/drain electrode from an external environment, to thereby complete the formation of a P-type poly-silicon TFT having a storage capacitor.
In the fabrication method described above, the step of forming one of the storage capacitor electrodes using a poly-silicon layer will be described in more detail with reference to FIGS. 4A to 4C.
As shown in FIG. 4A, a poly-silicon layer 401 having a predetermined pattern is formed on a substrate. The poly-silicon layer 401 is formed by depositing an amorphous silicon layer on the substrate, by crystallizing the amorphous silicon layer using a heat treatment, and by patterning the crystallized silicon layer. The poly-silicon layer will be used as an active layer of a TFT and as one of the electrodes of a storage capacitor. In order to use the poly-silicon layer 401 as an electrode of the storage capacitor, the portion of the poly-silicon layer corresponding to the electrode of the storage capacitor (storage capacitor region) needs to be metalized.
FIG. 4B illustrates a process of metalizing the storage capacitor region. Referring to FIG. 4B, a mask 403 covers the poly-silicon layer including a TFT region 401 a except for the storage capacitor region 401b. Then, impurity ions are injected into the storage capacitor region 401b. A photo-resist is used as the mask 403. Therefore, the process of metalizing the storage capacitor region 401b includes coating a photo-resist on the poly-silicon layer; exposing the storage capacitor region 401b using a photo-mask; developing the photo-resist; injecting impurity ions; and removing the photo-resist.
Subsequently, after a gate insulating layer is formed on the poly-silicon layer, a metal layer is formed to form a gate electrode 404 and a storage capacitor electrode 405 by a photolithography process, as shown in FIG. 4C. After the gate electrode 404 and the storage capacitor electrode 405 are formed, follow-up processes proceed to form a TFT as described above with reference to FIGS. 3D and 3E.
As stated above, the liquid crystal display device using the poly-silicon layer as an electrode of the storage capacitor is disadvantageous in that an additional photo-mask process is required to metalize the poly-silicon layer of the storage capacitor region.